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f3 ice3as02 / ice3bs02 ice3as02g / ice3BS02G off-line smps current mode controller with integrated 500v startup cell never stop thinking. power management & supply datasheet, v1.1, 21 may 2004
edition 2004-05-21 published by infineon technologies ag, st.-martin-strasse 53, d-81541 mnchen ? infineon technologies ag 1999. all rights reserved. attention please! the information herein is given to describe certain co mponents and shall not be considered as warranted char- acteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. infineon technologies is an approved cecc manufacturer. information for further information on technology, delivery terms and conditions and prices pleas e contact your nearest infin- eon technologies office in germany or our infineon technologies representatives worldwide (see address list). warnings due to technical requirements components may contain dang erous substances. for information on the types in question please contact your near est infineon technologies office. infineon technologies components may only be used in lif e-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered. for questions on technology, delivery and prices please contact the infineon technologies offices in germany or the infineon technologies companies and representatives worldwide: see our webpage at http:// www.infineon.com f3 revision history: 2004-05-21 datasheet previous version: page subjects (major changes since last revision)
type ordering code f osc package ice3as02 q67040-s4661-a101 100khz pg-dip-8-6 ice3bs02 q67040-s4637-a101 67khz pg-dip-8-6 ice3as02g 100khz p-dso-8-8 ice3BS02G 67khz p-dso-8-8 version 1.1 3 21 may 2004 f3 ice3as02 / ice3bs02 ice3as02g / ice3BS02G off-line smps current mode controller with integrated 500v startup cell pdso83 6 test pg-dip-8-6 p-dso-8-8 product highlights leadfree dip package active burst mode to reach the lowest standby power requirements < 100mw protection features (auto restart mode) to increase robustness and safety of the system adjustable blanking window for high load jumps to increase system reliability features ? active burst mode for lowest standby power @ light load controlled by feedback signal fast load jump response in active burst mode 500v startup cell switched off after start up 100/67khz internally fixed switching frequency auto restart mode for overtemperature detection auto restart mode for vcc overvoltage detection auto restart mode for overload and open loop auto restart mode for vcc undervoltage blanking window for short duration high current user defined soft start minimum of external components required max duty cycle 72% overall tolerance of current limiting < 5% internal pwm leading edge blanking soft switching for low emi description the f3 controller provides active burst mode to reach the lowest standby power requirements <100mw at no load. as the controller is always active during active burst mode, there is an immediate response on load jumps without any black out in the smps. in active burst mode the ripple of the output voltage can be reduced <1%. furthermore, to increase the robustness and safety of the system, the device enters into auto restart mode in the cases of overtemperature, vcc overvoltage, output open loop or overload and vcc undervoltage. by means of the internal precise peak current limitation, the dimension of the transformer and the secondary diode can be lowered which leads to more cost efficiency. an adjustable blanking window prevents the ic from entering auto restart mode or active burst mode unintentionally in case of high load jumps. c softs c vcc c bulk converter dc output + ice3as02/g ice3bs02/g snubber power management pwm controller current mode 85 ... 270 vac typical application r sense gate cs startup cell hv precise low tolerance peak current limitation softs fb gnd vcc control unit - active burst mode auto restart mode
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G table of contents page version 1.1 4 21 may 2004 1 pin configuration and functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 1.1 pin configuration with pg-dip-8-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 1.2 pin configuration with p-dso-8-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 1.3 pin functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 2 representative blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 3 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.2 power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.3 startup phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3.4 pwm section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.4.1 oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.4.2 pwm-latch ff1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.4.3 gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.5 current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.5.1 leading edge blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.5.2 propagation delay compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.6 control unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 3.6.1 adjustable blanking window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 3.6.2 active burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 3.6.2.1 entering active burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 3.6.2.2 working in active burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 3.6.2.3 leaving active burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 3.6.3 protection mode(auto restart mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.2 operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.3 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4.3.1 supply section 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4.3.2 supply section 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4.3.3 internal voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4.3.4 pwm section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 4.3.5 control unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 4.3.6 current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 4.3.7 driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 5 typical performan ce characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .21 6 outline dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
version 1.1 5 21 may 2004 f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G pin configuration and functionality 1 pin configuration and functionality 1.1 pin configuration with pg-dip-8-6 figure 1 pin configuration pg-dip-8-6(top view) note: pin 4 and 5 are shorted within the dip package. 1.2 pin configuration with p-dso-8-8 figure 2 pin configuration p-dso-8-8(top view) pin symbol function 1 softs soft-start 2 fb feedback 3 cs current sense 4 hv high voltage input 5 hv high voltage input 6 gate driver stage output 7 vcc controller supply voltage 8 gnd controller ground package pg-dip-8-6 1 6 7 8 4 3 2 5 gnd softs fb cs vcc gate hv hv pin symbol function 1 softs soft-start 2 fb feedback 3 cs current sense 4 gate driver stage output 5 hv high voltage input 6 n.c. not connected 7 vcc controller supply voltage 8 gnd controller ground package p-dso-8-8 1 6 7 8 4 3 2 5 gnd softs fb cs vcc n.c. gate hv
version 1.1 6 21 may 2004 f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G pin configuration and functionality 1.3 pin functionality softs (soft start & auto restart control) the softs pin combines the functions of soft start during start up and error detection for auto restart mode. these functions are implemented and can be adjusted by means of an external capacitor at softs to ground. this capacitor also provides an adjustable blanking window for high load jumps, before the ic enters into auto restart mode. fb (feedback) the information about the regulation is provided by the fb pin to the internal protection unit and to the internal pwm-comparator to control the duty cycle. the fb- signal controls in case of light load the active burst mode of the controller. cs (current sense) the current sense pin senses the voltage developed on the series resistor inserted in the source of the external powermos. if cs reaches the internal threshold of the current limit comparator, the driver output is immediately switched off. furthermore the current information is provided for the pwm- comparator to realize the current mode. gate the gate pin is the output of the internal driver stage connected to the gate of an external powermos. hv (high voltage) the hv pin is connected to the rectified dc input voltage. it is the input for the integrated 500v startup cell. vcc (power supply) the vcc pin is the positive supply of the ic. the operating range is between 8.5v and 21v. gnd (ground) the gnd pin is the ground of the controller.
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G representative blockdiagram version 1.1 7 21 may 2004 2 representative blockdiagram figure 3 representative blockdiagram c11 internal bias voltage reference oscillator duty cycle max x3.7 soft-start comparator current limiting pwm op current mode soft start c2 c1 17v 4.0v r fb power management c softs c vcc 85 ... 270 vac c bulk + converter dc output v out spike blanking 8.0us . .8 0. s 0.8 0 d1 a 1 1 s ea e g g g 1 g8 g1 ealsn 1 k s1 1 1 edn ee ss gd 8 b sein nlni 1 1 eaing ge blanking n k 1p g1 1 k 1p pagaindela penain nelagek 1 8 g g g11 ieb e sgbsg sne s gae sapell dlea sg bsg s 1k k
version 1.1 8 21 may 2004 f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G functional description 3 functional description all values which are used in the functional description are typical values. for calculating the worst cases the min/max values which can be found in section 4 electrical characteristics have to be considered. 3.1 introduction the f3 is the further development of the f2 to meet the requirements for the lowest standby power at minimum load and no load conditions. a new fully integrated standby power concept is implemented into the ic in order to keep the application design easy. compared to f2 no further external parts are needed to achieve the lowest standby power. an intelligent active burst mode is used for this standby mode. after entering this mode there is still a full control of the power conversion by the se condary side via the same optocoupler that is used for the normal pwm control. the response on load jumps is optimized. the voltage ripple on v out is minimized. v out is further on well controlled in this mode. the usually external connected rc-filter in the feedback line after the optocoupler is integrated in the ic to reduce the external part count. furthermore a high voltage startup cell is integrated into the ic which is switched off once the undervoltage lockout on-threshold of 15v is exceeded. the external startup resistor is no longer necessary. power losses are therefore reduced. this increases the efficiency under light load conditions drastically. the soft-start capacitor is also used for providing an adjustable blanking window for high load jumps. during this time window the overl oad detection is disabled. with this concept no furthe r external components are necessary to adjust the blanking window. an auto restart mode is implemented in the ic to reduce the average power conversion in the event of malfunction or unsafe operating condition in the smps system. this feature increases the system?s robustness and safety which would otherwise lead to a destruction of the smps. once the malfunction is removed, normal operation is automatically initiated after the next start up phase. the internal precise peak current limitation reduces the costs for the transformer and the secondary diode. the influence of the change in the input voltage on the power limitation can be avoided together with the integrated propagation delay compensation. therefore the maximum power is nearly independent on the input voltage which is required for wide range smps. there is no need for an extra over-sizing of the smps, e.g. the transformer or powermos. 3.2 power management figure 4 power management the undervoltage lockout monitors the external supply voltage v vcc . when the smps is plugged to the main line the internal startup cell is biased and starts to charge the external capacitor c vcc which is connected to the vcc pin. this vcc charge current which is provided by the startup cell from the hv pin is 1.05ma. when v vcc exceeds the on-threshold v ccon =15v the internal voltage reference and bias circuit are switched on. then the startup cell is switched off by the undervol tage lockout and therefore no power losses present due to the connection of the startup cell to the bus voltage (hv). to avoid uncontrolled ringing at switch-on a hysteresis is implemented. the switch-off of the controller can only take place after active mode was entered and v vcc falls below 8.5v. the maximum current consumption before the controller is activated is about 160 a. when v vcc falls below the off-threshold v ccoff =8.5v the internal reference is switched off and the power down reset let t1 discharging the soft-start capacitor c softs at pin softs. thus it is ensured that at every startup cycle the voltage ramp at pin softs starts at zero. the internal voltage reference is switched off if auto restart mode is entered. the current consumption is then reduced to 300 a. power management 6.5v t1 softs active burst mode auto restart mode internal bias voltage reference startup cell vcc hv undervoltage lockout 15v 8.5v
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G functional description version 1.1 9 21 may 2004 once the malfunction condition is removed, this block will then turn back on. the recovery from auto restart mode does not require disconnecting the smps from the ac line. when active burst mode is entered, the internal bias is switched off in order to reduce the current consumption to below 1.05ma while keeping the voltage reference active as this is necessary in this mode. 3.3 startup phase figure 5 soft start at the beginning of the startup phase, the ic provides a soft start duration whereby it controls the maximum primary current by means of a duty cycle limitation. a signal v softs which is generated by the external capacitor c softs in combination with the internal pull up resistor r softs , determines the duty cycle until v softs exceeds 4v. when the soft start begins, c softs is immediately charged up to approx. 1v by t2. therefore the soft start phase takes place between 1v and 4v. above v softss = 4v there is no longer duty cycle limitation dc max which is controlled by comparator c7 since comparator c2 blocks the gate g7 (see figure 5). the maximum charge current in the very first stage when v softs is below 1v, is limited to 1.32ma. figure 6 startup phase by means of this extra charge stage, there is no delay in the beginning of the startup phase when there is still no switching. furthermore soft start is finished at 4v to have faster the maximum power capability. the duty cycles dc 1 and dc 2 are depending on the mains and the primary inductance of the transformer. the limitation of the primary current by dc 2 is related to v softs = 4v. but dc 1 is related to a maximum primary current which is limited by the internal current limiting with cs = 1v. therefore the maximum startup phase is divided into a soft start phase until t1 and a phase from t1 until t2 where maximum power is provided if demanded by the fb signal. soft-start comparator soft start & g7 c7 c softs r softs t2 3.25k 6.5v t3 1v softs gate dri ver 0.85v x3.7 pwm op cs 4v c2 dc max dc 1 dc 2 t t v softs max. soft start phase 1v 4v 5.4v max. startup phase t1 t2
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G functional description version 1.1 10 21 may 2004 3.4 pwm section figure 7 pwm section 3.4.1 oscillator the oscillator generates a fixed frequency. the switching frequency for ice3as02/g is f osc = 100khz and for ice3bs02/g f osc = 67khz. a resistor, a capacitor and a current source and current sink which determine the frequency are integrated. the charging and discharging current of the implemented oscillator capacitor are internally trimmed, in order to achieve a very accurate switching frequency. the ratio of controlled charge to discharge current is adjusted to reach a maximum duty cycle limitation of d max =0.72. 3.4.2 pwm-latch ff1 the oscillator clock output provides a set pulse to the pwm-latch when initiating the external power switch conduction. after setting the pwm-latch can be reset by the pwm comparator, the soft start comparator or the current-limit comparator. in case of resetting, the driver is shut down immediately. 3.4.3 gate driver the gate driver is a fast totem pole gate drive which is designed to avoid cross conduction currents and which is equipped with a zener diode z1 (see figure 8) in order to improve the control of the gate attached power transistors as well as to protect them against undesirable gate overvoltages. the gate driver is active low at voltages below the undervoltage lockout threshold v vccoff . figure 8 gate driver the driver-stage is optimized to minimize emi and to provide high circuit efficiency. this is done by reducing the switch on slope when exceeding the external power switch threshold. this is achieved by a slope control of the rising edge at the driver?s output (see figure 9). figure 9 gate rising slope thus the leading switch on spike is minimized. when the external power switch is switched off, the falling shape of the driver is slowed down when reaching 2v to prevent an overshoot below ground. furthermore the driver circuit is designed to eliminate cross conduction of the output stage. during powerup when vcc is below the undervoltage lockout threshold v vccoff , the output of the gate driver is low to disable power transfer to the seconding side. oscillator duty cycle max gate driver 0.72 clock & g9 1 g8 pwm section ff1 r s q gate soft start comparator pwm comparator current limiting z1 vcc 1 pwm-latch gate t v gate 5v c load = 1nf ca. t = 130ns
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G functional description version 1.1 11 21 may 2004 3.5 current limiting figure 10 current limiting block there is a cycle by cycle current limiting realized by the current-limit comparator c10 to provide an overcurrent detection. the source current of the external power switch is sensed via an external sense resistor r sense . by means of r sense the source current is transformed to a sense voltage v sense which is fed into the pin cs. if the voltage v sense exceeds the internal threshold voltage v csth the comparator c10 immediately turns off the gate drive by resetting the pwm latch ff1. a propagation delay compensation is added to support the immediate shut down without delay of the power switch in case of current limiting. the influence of the ac input voltage on the maximum output power can thereby be avoided. to prevent the current limiting from distortions caused by leading edge spikes a leading edge blanking is integrated in the current sense path for the comparators c10, c12 and the pwm-op. the output of comparator c12 is activated by the gate g10 if active burst mode is entered. once activated the current limiting is thereby reduced to 0.257v. this voltage level determines the power level when the active burst mode is left if there is a higher power demand. 3.5.1 leading edge blanking figure 11 leading edge blanking each time when the external power switch is switched on, a leading edge spike is generated due to the primary-side capacitances and secondary-side rectifier reverse recovery time. this spike can cause the gate drive to switch off unintentionally. to avoid a premature termination of the switching pulse, this spike is blanked out with a time constant of t leb = 220ns. during this time, the gate drive will not be switched off. 3.5.2 propagation delay compensation in case of overcurrent detection, the switch-off of the external power switch is delayed due to the propagation delay of the circuit. this delay causes an overshoot of the peak current i peak which depends on the ratio of di/dt of the peak current (see figure 12). figure 12 current limiting the overshoot of signal2 is bigger than of signal1 due to the steeper rising waveform. this change in the slope is depending on the ac input voltage. propagation delay compensation is integrated to limit the overshoot dependency on di/dt of the rising primary current. that means the propagation delay time between exceeding the current sense threshold v csth and the switch off of the external power switch is compensated over temperature within a wide range. c10 c12 & 0.257v leading edge blanking 220ns g10 propagation-delay compensation v csth active burst mode pwm latch ff1 10k d1 1pf pwm-op cs current limiting t v sense v csth t leb = 220ns t i sense i limit t propagation delay i overshoot1 i peak1 signal2 signal1 i overshoot2 i peak2
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G functional description version 1.1 12 21 may 2004 current limiting is now possible in a very accurate way. e.g. i peak = 0.5a with r sense = 2. without propagation delay compensation the current sense threshold is set to a static voltage level v csth =1v. a current ramp of figure 13 overcurrent shutdown the propagation delay compensation is realized by means of a dynamic threshold voltage v csth (see figure 14). in case of a steeper slope the switch off of the driver is earlier to compensate the delay. figure 14 dynamic voltage threshold v csth 3.6 control unit the control unit contains the functions for active burst mode and auto restart mode. the active burst mode and the auto restart mode are combined with an adjustable blanking window which is depending on the external soft start capacitor. by means of this adjustable blanking window, the ic avoids entering into these two modes accidentally. furthermore it also provides a certain time whereby the overload detection is delayed. this delay is useful for applications which normally works with a low current and occasionally require a short duration of high current. 3.6.1 adjustable blanking window figure 15 adjustable blanking window v softs is clamped at 4.4v by the closed switch s1 after the smps is settled. if overload occurs v fb is exceeding 4.8v. auto restart mode can?t be entered as the gate g5 is still blocked by the comparator c3. but after v fb has exceeded 4.8v the switch s1 is opened via the gate g2. the external soft start capacitor can 0,9 0,95 1 1,05 1,1 1,15 1,2 1,25 1,3 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2 with compensation without compensation dt dv sense s v sense v v t v csth v osc signal1 signal2 v sense propagation delay max. duty cycle off time t c3 5.4v c4 4.8v c5 1.32v & g5 & g6 4.4v s1 1 g2 control unit 5k
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G functional description version 1.1 13 21 may 2004 now be charged further by the integrated pull up resistor r softs . the comparator c3 releases the gates g5 and g6 once v softs has exceeded 5.4v. therefore there is no entering of auto restart mode possible during this charging time of the external capacitor c softs . the same procedure happens to the external soft start capacitor if a low load condition is detected by comparator c5 when v fb is falling below 1.32v. only after v softs has exceeded 5.4v and v fb is still below 1.32v active burst mode is entered. 3.6.2 active burst mode the controller provides acti ve burst mode for low load conditions at v out . active burst mode increases significantly the efficiency at light load conditions while supporting a low ripple on v out and fast response on load jumps. during active burst mode which is controlled only by the fb signal the ic is always active and can therefore immediately response on fast changes at the fb signal. the startup cell is kept switched off to avoid increased power losses for the self supply. figure 16 active burst mode the active burst mode is lo cated in the control unit. figure 16 shows the related components. 3.6.2.1 entering active burst mode the fb signal is always observed by the comparator c5 if the voltage level falls be low 1.32v. in that case the switch s1 is released wh ich allows the capacitor c softs to be charged starting from the clamped voltage level at 4.4v in normal operating mode. if v softs exceeds 5.4v the comparator c3 releases the gate g6 to enter the active burst mode. the time window that is generated by combining the fb and softs signals with gate g6 avoids a sudden entering of the active burst mode due to large load jumps. this time window can be adjusted by the external capacitor c softs . after entering active burst mode a burst flag is set and the internal bias is switched off in order to reduce the current consumption of the ic down to approx. 1.05ma. in this off state phase the ic is no longer self supplied so that therefore c vcc has to provide the vcc current (see figure 17). furthermore gate g11 is then released to start the next burst cycle once v fb has 3.4v exceeded. it has to be ensured by the application that the vcc remains above the undervoltage lockout level of 8.5v to avoid that the startup cell is accidentally switched on. otherwise power losses are significantly increased. the minimum vcc level during active burst mode is depending on the load conditions and the application. the lowest vcc level is reached at no load conditions at v out . 3.6.2.2 working in active burst mode after entering the active burst mode the fb voltage rises as v out starts to decrease due to the inactive pwm section. comparator c6a observes the fb signal if the voltage level 4v is exceeded. in that case the internal circuit is again activated by the internal bias to start with switching. as now in active burst mode the gate g10 is released the curre nt limit is only 0.257v to reduce the conduction losses and to avoid audible noise. if the load at v out is still below the starting level for the active burst mode the fb signal decreases down to 3.4v. at this level c6b deactivates again the internal circuit by switching off the internal bias. the gate g11 is released as after entering active burst mode the burst flag is set. if working in active burst mode the fb voltage is changing like a saw tooth between 3.4v and 4v (see figure 17). 3.6.2.3 leaving active burst mode the fb voltage immediately increases if there is a high load jump. this is observed by comparator c4. as the current limit is ca. 26% during active burst mode a certain load jump is needed that fb can exceed 4.8v. at this time c4 resets the active burst mode which also c3 5.4v c4 4.8v c6a 4.0v c5 1.32v fb control unit active burst mode 4.4v s1 5k internal bias r softs 6.5v softs & g10 current limiting & g6 c6b 3.4v & g11
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G functional description version 1.1 14 21 may 2004 blocks c12 by the gate g10. maximum current can now be provided to stabilize v out . figure 17 signals in active burst mode 3.6.3 protection mode (auto restart mode) in order to increase the smps system?s robustness and safety, the ic provides the auto restart mode as a protection feature. the auto restart mode is entered upon detection of the following faults in the system: vcc overvoltage overtemperature overload open loop vcc undervoltage short optocoupler figure 18 auto restart mode the vcc voltage is observed by comparator c1 if 17v is exceeded. the output of c1 is combined with both the output of c11 which checks for softs<4.0v, and the output of c4 which checks for fb>4.8v. therefore the overvoltage detection is can only active during soft start phase(softs<4.0v) and when fb signal is outside the operating range > 4.8v. this means any small voltage overshoots of v vcc during normal operating cannot trigger the auto restart mode. in order to ensure system reliability and prevent any false activation, a blanking time is implemented before the ic can enter into the auto restart mode. the output of the vcc overvoltage detection is fed into a spike blanking with a time constant of 8.0 s. the other fault detection which can result in the auto restart mode and has this 8.0 s blanking time is the overtemperature detection. this block checks for a junction temperature of higher than 140c for malfunction operation. 1.32v 4.00v 4.80v v fb 4.40v 5.40v v softs t t 0.257v 1.00v v cs 8.5v v vcc t t 1.05ma i vcc t 7.2ma v out t max. ripple < 1% blanking window current limit level during active burst mode 3.40v entering acti ve burst mode leaving active burst mode c11 c1 17v c softs c3 5.4v c4 4.8v r softs auto restart mode & g5 & g1 thermal shutdown t j >140c 4.4v s1 6.5v vcc control unit 5k 4.0v softs fb voltage reference spike blanking 8.0us
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G functional description version 1.1 15 21 may 2004 once the auto restart mode is entered, the internal voltage reference is switched off in order to reduce the current consumption of the ic as much as possible. in this mode, the average current consumption is only 300 a as the only working block is the undervoltage lockout(uvlo) which controls the startup cell by switching on/off at v vccon /v vccoff . as there is no longer a self supply by the auxiliary winding, vcc starts to drop. the uvlo switches on the integ rated sta rtup cell when vcc falls below 8.5v. it will continue to charge vcc up to 15v whereby it is switched off again and the ic enters into the start up phase. as long as all fault condi tions have been removed, the ic will automaticlally power up as usual with switching cycle at the gate output after soft start duration. thus the name auto restart mode. other fault detections which are active in normal operation is the sensing for overload, open loop and vcc undervoltage conditions. in the first 2 cases, fb will rise above 4.8v which will be observed by c4. at this time, s1 is released such that v softs can rise from its earlier clamp voltage of 4.4v. if v softs exceeds 5.4v which is observed by c3, auto restart mode is entered as both inputs of the gate g5 are high. this charging of the soft start capacitor from 4.4v to 5.4v defines a blanking window which prevents the system from entering into auto restart mode un- intentionally during large load jumps. in this event, fb will rise close to 6.5v for a short duration before the loop regulates with fb less than 4.8v. this is the same blanking time window as for the active burst mode and can therefore be adjusted by the external c softs . in the case of vcc undervoltage, ie. vcc falls below 8.5v, the ic will be turn off with the startup cell charging vcc as described earlier in this section. once vcc is charged above 15v, the ic will start a new startup cycle. the same procedure applies when the system is under short optocoupler fault condition, as it will lead to vcc undervoltage.
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G electrical characteristics version 1.1 16 21 may 2004 4 electrical characteristics note: all voltages are measured with respect to ground (pin 8). the voltage levels are valid if other ratings are not violated. 4.1 absolute maximum ratings note: absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. for the same reason make sure, that any capacitor that will be connected to pin 7 ( v cc) is discharged before assembling the application circuit. 4.2 operating range note: within the operating range the ic operates as described in the functional description. parameter symbol limit values unit remarks min. max. hv voltage v hv - 500v v vcc supply voltage v vcc -0.3 22 v fb voltage v fb -0.3 6.5 v softs voltage v softs -0.3 6.5 v gate voltage v gate -0.3 22 v internally clamped at 11.5v cs voltage v cs -0.3 6.5 v junction temperature t j -40 150 c storage temperature t s -55 150 c total power dissipation p totdso8 - 0.45 w p-dso-8-8, t amb < 50c p totdip8 - 0.90 w pg-dip-8-6, t amb < 50c thermal resistance junction-ambient r thjadso8 - 185 k/w p-dso-8-8 r thjadip8 - 90 k/w pg-dip-8-6 esd capability(incl. hv pin) v esd - 3 kv human body model 1) 1) according to eia/jesd22-a114-b (discharging a 100pf capacitor through a 1.5k series resistor) parameter symbol limit values unit remarks min. max. vcc supply voltage v vcc v vccoff 20 v junction temperature of controller t jcon -25 130 c max value limited due to thermal shut down of controller
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G electrical characteristics version 1.1 17 21 may 2004 4.3 characteristics 4.3.1 supply section 1 note: the electrical characteristics involve the spread of values within the specified supply voltage and junction temperature range t j from ? 25 c to 130 c. typical values represent the median values, which are related to 25c. if not otherwise stated, a supply voltage of v cc = 15 v is assumed. 4.3.2 supply section 2 4.3.3 internal voltage reference parameter symbol limit values unit test condition min. typ. max. start up current i vccstart - 160 220 a v vcc =14v vcc charge current i vcccharge1 0.55 1.05 1.60 ma v vcc = 0v i vcccharge2 - 0.88 - ma v vcc =14v leakage current of start up cell i startleak - 0.2 20 a v vcc =16v, v hv = 450v supply current with inactive gate i vccsup1 - 5.5 7.0 ma supply current in auto restart mode with inactive gate i vccrestart - 300 - a i fb = 0 i softs = 0 supply current in active burst mode with inactive gate i vccburst1 - 1.05 1.25 ma v vcc =15v v fb = 3.7v, v softs = 4.4v i vccburst2 - 0.95 1.15 ma v vcc = 9.5v v fb = 3.7v, v softs = 4.4v vcc turn-on threshold vcc turn-off threshold vcc turn-on/off hysteresis v vccon v vccoff v vcchys 14.2 8.0 - 15.0 8.5 6.5 15.8 9.0 - v v v parameter symbol limit values unit test condition min. typ. max. supply current with active gate ice3as02 ice3as02g i vccsup2 - 7.0 8.5 ma v softs = 4.4v i fb = 0, c load =1nf ice3bs02 ice3BS02G i vccsup2 - 6.5 8.0 ma parameter symbol limit values unit test condition min. typ. max. trimmed reference voltage v ref 6.37 6.50 6.63 v measured at pin fb i fb = 0
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G electrical characteristics version 1.1 18 21 may 2004 4.3.4 pwm section 4.3.5 control unit parameter symbol limit values unit test condition min. typ. max. fixed oscillator frequency ice3as02 ice3as02g f osc1 92 100 108 khz f osc2 94 100 106 khz t j = 25c ice3bs02 ice3BS02G f osc1 61 67 73 khz f osc2 63 67 71 khz t j = 25c max. duty cycle d max 0.67 0.72 0.77 min. duty cycle d min 0 - - v fb < 0.3v pwm-op gain a v 3.5 3.7 3.9 voltage ramp max level v max-ramp - 0.85 - v v fb operating range min level v fbmin 0.3 0.7 - v v fb operating range max level v fbmax - - 4.75 v cs=1v, limited by comparator c4 1) 1) design characteristic (not meant for production testing) fb pull-up resistor r fb 16 20 27 k softs pull-up resistor r softs 39 50 62 k parameter symbol limit values unit test condition min. typ. max. deactivation level for softs comparator c7 by c2 v softsc2 3.85 4.00 4.15 v v fb > 5v clamped v softs voltage during normal operating mode v softsclmp 4.23 4.40 4.57 v v fb = 4v activation limit of comparator c3 v softsc3 5.20 5.40 5.60 v v fb > 5v softs startup current i softsstart - 1.3 - ma v softs = 0v over load & open loop detection limit for comparator c4 v fbc4 4.62 4.80 4.98 v v softs > 5.6v active burst mode level for comparator c5 v fbc5 1.23 1.30 1.37 v v softs > 5.6v active burst mode level for comparator c6a v fbc6a 3.85 4.00 4.15 v after active burst mode is entered
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G electrical characteristics version 1.1 19 21 may 2004 note: the trend of all the voltage levels in the control unit is the same regarding the deviation except v vccovp and v vccpd 4.3.6 current limiting active burst mode level for comparator c6b v fbc6b 3.25 3.40 3.55 v after active burst mode is entered overvoltage detection limit v vccovp 16.1 17.1 18.1 v v fb > 5v v softs < 4.0v thermal shutdown 1) t jsd 130 140 150 c spike blanking t spike - 8.0 - s 1) the parameter is not subject to production test - verified by design/characterization parameter symbol limit values unit test condition min. typ. max. peak current limitation (incl. propagation delay time of external mos) v csth 0.97 1.02 1.07 v d v sense / dt = 0.6v/ s (see figure 14) peak current limitation during active burst mode v cs2 0.232 0.257 0.282 v leading edge blanking t leb - 220 - ns v softs = 4.4v cs input bias current i csbias -1.0 -0.2 0 a v cs =0v parameter symbol limit values unit test condition min. typ. max.
version 1.1 20 21 may 2004 f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G electrical characteristics 4.3.7 driver section parameter symbol limit values unit test condition min. typ. max. gate low voltage v gatelow - - 1.2 v v vcc = 5 v i gate = 5 ma - - 1.5 v v vcc = 5 v i gate = 20 ma - 0.8 - v i gate = 0 a - 1.6 2.0 v i gate = 20 ma -0.2 0.2 - v i gate = -20 ma gate high voltage v gatehigh - 11.5 - v v vcc = 20v c l = 4.7nf - 10.5 - v v vcc = 11v c l = 4.7nf - 7.5 - v v vcc = v vccoff + 0.2v c l = 4.7nf gate rise time (incl. gate rising slope) t rise - 150 - ns v gate = 2v ...9v 1) c l = 4.7nf gate fall time t fall - 55 - ns v gate = 9v ...2v 1) c l = 4.7nf gate current, peak, rising edge i gate -0.5 - - a c l = 4.7nf 2) gate current, peak, falling edge i gate - - 0.7 a c l = 4.7nf 2) 1) transient reference value 2) design characteristic (not meant for production testing)
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G typical performance characteristics version 1.1 21 21 may 2004 5 typical performance characteristics
f3 ice3as02 / ice3as02g / ice3bs02 / ice3BS02G outline dimension version 1.1 22 21 may 2004 6 outline dimension figure 19 pg-dip-8-6 (leadfree plastic dual in-line outline) figure 20 p-dso-8-8 (plastic dual small outline) dimensions in mm pg-dip-8-6 (leadfree plastic dual in-line outline) p-dso-8-8 (plastic dual small outline)
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